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High-Performance Equalizer from TI Enables 4-Gbps Speed on Backplanes Designed for 1-Gbps

On-Board Pre-emphasis and Dual Redundancy Muxes Make Device Ideal for Datacomm Upgrades

Nov 4, 2004

DALLAS (November 4, 2004) - Texas Instruments Incorporated (TI) (NYSE: TXN) today introduced the industry´s first 0- to 4-Gbps data buffer/signal conditioner with a dual multiplexer. The SN65LVCP40 enables designers of communications systems to upgrade 1-Gbps systems to 4-Gbps without redesigning their backplanes. The device supports high-speed networking standards such as XAUI, Gigabit Ethernet, FibreChannel and InfiniBand and can also be applied as a link replicator or data redundancy switch in backplanes. (See www.ti.com/sc04236.)

The LVCP40 provides four selectable levels of output pre-emphasis on the drivers so that the designer can optimize performance to particular trace or cable lengths. Receiver equalization on the inputs reduces jitter, which is measured at 90-psec at input, to as low as 30-psec at output. As a result, the equalizer compensates for intersymbol interference (ISI) effects inherent in transmission of data over longer distances. The equalization is optimized to compensate for a FR-4 backplane trace with 5-dB, high-frequency loss between 375-MHz and 1.875-MHz, which corresponds to a 20-inch long FR-4 trace with 8-mil trace width.
The LVCP40 combines a pair of 1:2 buffers with a pair of 2:1 serial multiplexers (mux) and incorporates a selectable switch-side loopback that supports system testing. Each of the two independent channels consists of a transmitter with a fan-out of two and a receiver with a 2:1 input multiplexer. The multiplexers can be configured to handle system redundancy requirements from the line card to the controller card. They can also be configured to provide a loopback function through the device for either device-level or system-level testing.
"Until now, communicating at multi-gigabit speeds over backplanes has meant a substantial investment in specialized transmission media," said Art George, vice president and manager of TI's high-performance linear business. "Using the capabilities of TI's BiCom-III process, today the LVCP40 is able to open the data 'eye' at industry-leading low power, allowing designers to improve performance and save cost and time to market by quickly upgrading their systems to 4-Gbps, while leaving in place their 1-Gbps backplanes."

About BiCom-III

The BiCom-III SiGe process focuses TI´s state-of-the-art manufacturing technology on the future needs of high-performance systems. The process is the first to integrate complementary NPN and PNP bipolar transistors in a SiGe process. The complementary bipolar transistors enable many high-performance analog and mixed-signal products, increasing speed up to 3X while reducing noise by as much as one half. BiCom-III affords the LVCP40 fast edge rates of 80-psec at low power consumption of only 330-mW/channel typical or 440-mW/channel maximum, and the process enables excellent electromagnetic isolation between channels to minimize crosstalk.

Key Features

  • 5-dB receiver equalization for ISI jitter cleaning 
  • Driver pre-emphasis (0/3/6/9-dB) 
  • Low deterministic jitter (30-psec output DJ with input trace length of up to 20-inch FR-4) and sub 1-psec random jitter typical or 2-psec RJ maximum 
  • High channel-to-channel noise isolation 
  • Fast edge rates (80-psec) 
  • Low power (660-mW @ 4-Gbps typical or 880-mW @ 4-Gbps maximum) 
  • Loopback mode 
  • 1200-mV output swing 
  • 100-Ohm internal receiver termination with self-biasing and oddcommon-mode noise termination 
  • 3.3-V VDD

Availability, Pricing and Support

The SN65LVCP40 is available in volume from TI and its authorized distributors, packaged in a 48-pin QFN (quad flatpack no-lead) lead-free package. Suggested resale pricing in 1,000-piece quantities is $17.40 each. Samples are available for 24-hour delivery.