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TI Announces Highly Integrated Clock Multiplier Featuring Industry's Best Performance

Multiple Frequency Outputs, Low Jitter Benefit Consumer Electronics

Aug 3, 2004

DALLAS (August 4, 2004) - Leveraging its process technology capabilities, Texas Instruments (TI) (NYSE: TXN) today introduced a highly-integrated clocking integrated circuit (IC) that features three on-chip phase locked loop (PLL) filter components and best-in-class performance. The new clock multiplier´s architecture eliminates the need for external components to support PLL structures, which reduces overall system cost and conserves board space. With very low period jitter and ability to generate multiple clock frequencies, the technology behind the device is well-suited for consumer electronics such as game systems, DVD player/recorders, digital televisions and set-top boxes. (See www.ti.com/sc04169 for more information.)


From a 54-MHz system clock, the CDC5806 generates a video, audio, CPU, USB and portable memory clock out of a single device. Three PLLs generate the various output frequencies from the system clock. On-chip loop filters and internal feedback eliminate the need for external components. Developed in TI's RF SiGe process, the CDC5806 offers low jitter for clock distribution and a very low peak-to-peak period jitter of up to 150 psec.
Future clocks developed in this process will integrate features that help reduce electromagnetic interference (EMI), such as variable Spread Spectrum Clocking (SSC). Variable SSC also enables system designers to fine-tune their designs by allowing them to test various levels of SSC in the system. TI's technology allows integration of such features while maintaining excellent PLL frequency isolation.

Key Features of CDC5806 Include the Following:

  • Clock input accepts single-ended LVCMOS 
  • Uses a system clock of 54.000 MHz input to generate multiple output frequencies 
  • Low jitter for clock distribution 
  • Operates from single 3.3V supply 
  • Generates the following clocks:
    • VIDCLK 74.175824 MHz/54 MHz (buffered)
    • AUDCLK 16.9344 MHz/12.288 MHz 
    • CPUCLK 64 MHz 
    • USBCLK 48 MHz 
    • SPCLK 32 MHz 
    • MSCLK 38.4 MHz/19.2 MHz/12 MHz 
  • PLL filter components integrated 
  • Very low peak-to-peak period jitter characteristic of maximum 150 psec 
  • Industrial temperature range -40 C to 85 C

Available Today

The CDC5806 comes in a 20-pin TSSOP package and is available now from TI and its authorized distributors. Suggested resale pricing is $2.15 each in quantities of 1,000 units.


Information on the complete line of clock solutions from TI is in the Clocks and Timers Selection Guide, available at 

www.ti.com/clocks

.