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Texas Instruments Honored as Part of Cisco Systems "Supplier of the Year" Awards

Texas Instruments ASIC Solutions Positively Impact Cisco Customer Satisfaction

Dec 31, 2003

DALLAS (December 31, 2003) - Texas Instruments Incorporated (NYSE: TXN) (TI) announced that it is the recipient of two "Supplier of the Year" awards from Cisco Systems in the Technology and Semiconductor categories. TI was selected due to its ability to deliver ASIC solutions that exceed expectations in areas including flexibility, responsiveness, technology, value, quality, service and support.
"We are pleased to honor Texas Instruments through the Cisco Supplier of the Year Awards, as TI has demonstrated the leadership qualities that make it a highly valuable supplier," said Linda Park, vice president of Supply Chain Management, Cisco Systems, Inc. "TI's ASIC technology solutions and customer support have contributed positively to our customer satisfaction, setting a standard for suppliers in its field."
"TI's ASIC business is designed to very closely support customers with their largest and most complex designs, said Steve Sutton, vice president of TI's ASIC business unit. "We feel honored to have Cisco as a customer and are very pleased to be recognized for our close collaboration on these highly integrated system solutions."
The "Technology" and "Semiconductor" awards were among nine presented to valued Cisco suppliers. A panel of representatives within the Cisco Global Supply Management organizations elected the recipients of the 2003 Supplier Appreciation Awards that were presented in October.
TI's ASIC team designs large and complex custom products by leveraging TI's advanced semiconductor process technology, embedded intellectual property (IP), advanced packaging and design tools. TI offers ASIC customers a wide range of high-quality IP systems expertise and leading edge process technology, and maintains leadership in high-speed serial and parallel I/O. The company leverages the most advanced EDA tools that are tightly integrated to provide complete design flows, from partitioning and timing closure to signal integrity and test vectors.