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Texas Instruments Introduces FPGA Power Management Reference Guide

Easy-to-Use Guidelines to Help FPGA Designers Quickly Meet Critical Power Consumption Requirements

Dec 16, 2002

DALLAS (Dec. 16, 2002) - Satisfying analog power consumption requirements in field programmable gate array (FPGA) design is an ongoing challenge to many FPGA designers. Texas Instruments (TI) makes that process substantially easier today with its new FPGA Power Management Reference Guide. The new guide provides designers with a quick way to select the appropriate TI power management device that supports popular FPGAs, such as Altera´s ACEX® 1K, APEXTM II, MercuryTM and StratixTM FPGAs, as well as Xilinx´s Virtex-IITM, Virtex-II ProTM, Spartan-IITM and Spartan-IIETM gate arrays.

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The power consumption of FPGAs depends on factors such as internal resources, operation clock frequency, toggle rates, routing and I/O power. The TI power management devices represented in the FPGA guide are selected for their ease-of-use, 3.3/5V rail operation, and ample margin to satisfy power-on-surge current requirements.

Available Today

The reference guide is free and available today at power.ti.com/fpgaguide.