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Lowest jitter PCIe clock buffers (LMK00334 and LMK00338)

The LMK00334 and LMK00338 are high-speed current steering logic (HCSL) clock fanout buffers that support PCI Express (PCIe) Gen-1, Gen-2, Gen-3 interface standards. The LMK00334 creates four buffered copies of an input clock, while the LMK00338 produces eight buffered copies. They deliver 70 percent lower additive jitter and significantly higher supply noise rejection than competitive devices, providing system designers with ample jitter margin over the PCIe 3.0 specification. Both devices are supported in TI’s new WEBENCH® Clock Architect to help simplify clock tree design for high-speed communications, networking, and data center systems, including servers, switches and routers.